Optimizing Memory Access Latencies on a Reconfigurable Multimedia Accelerator: A Case of a Turbo Product Codes Decoder

Samar Yazdani, Thierry Goubier, Bernard Pottier, Catherine Dezan. Optimizing Memory Access Latencies on a Reconfigurable Multimedia Accelerator: A Case of a Turbo Product Codes Decoder. In Jürgen Becker, Roger Woods, Peter M. Athanas, Fearghal Morgan, editors, Reconfigurable Computing: Architectures, Tools and Applications, 5th International Workshop, ARC 2009, Karlsruhe, Germany, March 16-18, 2009. Proceedings. Volume 5453 of Lecture Notes in Computer Science, pages 287-292, Springer, 2009. [doi]

@inproceedings{YazdaniGPD09,
  title = {Optimizing Memory Access Latencies on a Reconfigurable Multimedia Accelerator: A Case of a Turbo Product Codes Decoder},
  author = {Samar Yazdani and Thierry Goubier and Bernard Pottier and Catherine Dezan},
  year = {2009},
  doi = {10.1007/978-3-642-00641-8_30},
  url = {http://dx.doi.org/10.1007/978-3-642-00641-8_30},
  tags = {optimization, multimedia},
  researchr = {https://researchr.org/publication/YazdaniGPD09},
  cites = {0},
  citedby = {0},
  pages = {287-292},
  booktitle = {Reconfigurable Computing: Architectures, Tools and Applications, 5th International Workshop, ARC 2009, Karlsruhe, Germany, March 16-18, 2009. Proceedings},
  editor = {Jürgen Becker and Roger Woods and Peter M. Athanas and Fearghal Morgan},
  volume = {5453},
  series = {Lecture Notes in Computer Science},
  publisher = {Springer},
  isbn = {978-3-642-00640-1},
}