Modeling a switch architecture with virtual output queues and virtual channels in HPC-systems simulators

Pedro Yebenes, German Maglione Mathey, Jesús Escudero-Sahuquillo, Pedro Javier Garcia, Francisco J. Quiles. Modeling a switch architecture with virtual output queues and virtual channels in HPC-systems simulators. In International Conference on High Performance Computing & Simulation, HPCS 2016, Innsbruck, Austria, July 18-22, 2016. pages 380-386, IEEE, 2016. [doi]

Abstract

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