32-bit RISC CPU Based on MIPS Instruction Fetch Module Design - researchr publication

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Kui Yi, YueHua Ding. 32-bit RISC CPU Based on MIPS Instruction Fetch Module Design. In First IITA International Joint Conference on Artificial Intelligence, Hainan Island, China, 25-26 April 2009. pages 754-760, IEEE Computer Society, 2009. [doi]

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