Shouyi Yin, Dajiang Liu, Yu Peng, Leibo Liu, Shaojun Wei. Improving Nested Loop Pipelining on Coarse-Grained Reconfigurable Architectures. IEEE Trans. VLSI Syst., 24(2):507-520, 2016. [doi]
@article{YinLPLW16,
title = {Improving Nested Loop Pipelining on Coarse-Grained Reconfigurable Architectures},
author = {Shouyi Yin and Dajiang Liu and Yu Peng and Leibo Liu and Shaojun Wei},
year = {2016},
doi = {10.1109/TVLSI.2015.2400219},
url = {http://dx.doi.org/10.1109/TVLSI.2015.2400219},
researchr = {https://researchr.org/publication/YinLPLW16},
cites = {0},
citedby = {0},
journal = {IEEE Trans. VLSI Syst.},
volume = {24},
number = {2},
pages = {507-520},
}