Power-constrained test scheduling for multi-clock domain SoCs - researchr publication authors

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Tomokazu Yoneda, Kimihiko Masuda, Hideo Fujiwara. Power-constrained test scheduling for multi-clock domain SoCs. In Georges G. E. Gielen, editor, Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006. pages 297-302, European Design and Automation Association, Leuven, Belgium, 2006. [doi]

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