Tomokazu Yoneda, Kimihiko Masuda, Hideo Fujiwara. Power-constrained test scheduling for multi-clock domain SoCs. In Georges G. E. Gielen, editor, Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006. pages 297-302, European Design and Automation Association, Leuven, Belgium, 2006. [doi]
@inproceedings{YonedaMF06,
title = {Power-constrained test scheduling for multi-clock domain SoCs},
author = {Tomokazu Yoneda and Kimihiko Masuda and Hideo Fujiwara},
year = {2006},
doi = {10.1145/1131563},
url = {http://doi.acm.org/10.1145/1131563},
tags = {testing},
researchr = {https://researchr.org/publication/YonedaMF06},
cites = {0},
citedby = {0},
pages = {297-302},
booktitle = {Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006},
editor = {Georges G. E. Gielen},
publisher = {European Design and Automation Association, Leuven, Belgium},
isbn = {3-9810801-0-6},
}