Shusuke Yoshimoto, Shunsuke Okumura, Koji Nii, Hiroshi Kawaguchi, Masahiko Yoshimoto. Multiple-Cell-Upset Tolerant 6T SRAM Using NMOS-Centered Cell Layout. IEICE Transactions, 96-A(7):1579-1585, 2013. [doi]
@article{YoshimotoONKY13,
title = {Multiple-Cell-Upset Tolerant 6T SRAM Using NMOS-Centered Cell Layout},
author = {Shusuke Yoshimoto and Shunsuke Okumura and Koji Nii and Hiroshi Kawaguchi and Masahiko Yoshimoto},
year = {2013},
url = {http://search.ieice.org/bin/summary.php?id=e96-a_7_1579},
researchr = {https://researchr.org/publication/YoshimotoONKY13},
cites = {0},
citedby = {0},
journal = {IEICE Transactions},
volume = {96-A},
number = {7},
pages = {1579-1585},
}