A Soft Error Tolerance Estimation Method for Sequential Circuits

Masayoshi Yoshimura, Yusuke Akamine, Yusuke Matsunaga. A Soft Error Tolerance Estimation Method for Sequential Circuits. In 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2011, Vancouver, BC, Canada, October 3-5, 2011. pages 268-276, IEEE, 2011. [doi]

@inproceedings{YoshimuraAM11,
  title = {A Soft Error Tolerance Estimation Method for Sequential Circuits},
  author = {Masayoshi Yoshimura and Yusuke Akamine and Yusuke Matsunaga},
  year = {2011},
  doi = {10.1109/DFT.2011.22},
  url = {http://doi.ieeecomputersociety.org/10.1109/DFT.2011.22},
  researchr = {https://researchr.org/publication/YoshimuraAM11},
  cites = {0},
  citedby = {0},
  pages = {268-276},
  booktitle = {2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2011, Vancouver, BC, Canada, October 3-5, 2011},
  publisher = {IEEE},
  isbn = {978-1-4577-1713-0},
}