A 1.08-Gb/s Burst-mode Clock and Data Recovery Circuit using the Jitter Reduction Technique - researchr publication

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Kae-Dyi You, Herming Chiueh. A 1.08-Gb/s Burst-mode Clock and Data Recovery Circuit using the Jitter Reduction Technique. In International Symposium on Circuits and Systems (ISCAS 2009), 24-17 May 2009, Taipei, Taiwan. pages 1899-1902, IEEE, 2009. [doi]

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