A seamless representation for coupling transistor sizing with nanometric CMOS layout generation

Stephanie Youssef, Farakh Javid, Damien Dupuis, Ramy Iskander, Marie-Minerve Louërat. A seamless representation for coupling transistor sizing with nanometric CMOS layout generation. In 20th European Conference on Circuit Theory and Design, ECCTD 2011, Linkoping, Sweden, Aug. 29-31, 2011. pages 341-344, IEEE, 2011. [doi]

Abstract

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