Yi-Long Yu, Fu-Chen Huang, Chorng-Kuang Wang. A 1V 10-bit 500KS/s energy-efficient SAR ADC using Master-Slave DAC technique in 180nm CMOS. In Technical Papers of 2014 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2014, Hsinchu, Taiwan, April 28-30, 2014. pages 1-4, IEEE, 2014. [doi]
Abstract is missing.