A 5 MHz-BW 71.7-dB SNDR two-step hybrid-domain ADC in 65-nm CMOS

Zhe Yu, Yuhua Liang, Shubin Liu. A 5 MHz-BW 71.7-dB SNDR two-step hybrid-domain ADC in 65-nm CMOS. Microelectronics Journal, 117:105253, 2021. [doi]

@article{YuLL21-4,
  title = {A 5 MHz-BW 71.7-dB SNDR two-step hybrid-domain ADC in 65-nm CMOS},
  author = {Zhe Yu and Yuhua Liang and Shubin Liu},
  year = {2021},
  doi = {10.1016/j.mejo.2021.105253},
  url = {https://doi.org/10.1016/j.mejo.2021.105253},
  researchr = {https://researchr.org/publication/YuLL21-4},
  cites = {0},
  citedby = {0},
  journal = {Microelectronics Journal},
  volume = {117},
  pages = {105253},
}