A 50 MS/s 12-bit CMOS pipeline A/D converter with nonlinear background calibration - researchr publication authors

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Jie Yuan, Nabil H. Farhat, Jan Van der Spiegel. A 50 MS/s 12-bit CMOS pipeline A/D converter with nonlinear background calibration. In Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, CICC 2005, DoubleTree Hotel, San Jose, California, USA, September 18-21, 2005. pages 399-402, IEEE, 2005. [doi]

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