The following publications are possibly variants of this publication:
- A VLSI Design of a Pipelining and Area-Efficient Reed-Solomon DecoderWei-min Wang, Du-yan Bi, Xingmin Du, Lin-hua Ma. ieicet, 90-D(8):1301-1303, 2007. [doi]
- Area-efficient Reed-Solomon Decoder Design for 10-100 Gb/s ApplicationsBo Yuan, Li Li, Jin Sha, Zhongfeng Wang. iscas 2009: 2681-2684 [doi]
- High-speed area-efficient versatile Reed-Solomon decoder design for multi-mode applicationsBo Yuan, Li Li, Zhongfeng Wang. sips 2009: 179-184 [doi]