Shuai Yuan, Liji Wu, Ziqiang Wang, Xuqiang Zheng, Peng Wang, Wen Jia, Chun Zhang, Zhihua Wang. A 48mW 15-to-28Gb/s source-synchronous receiver with adaptive DFE using hybrid alternate clock scheme and baud-rate CDR in 65nm CMOS. In Wolfgang Pribyl, Franz Dielacher, Gernot Hueber, editors, st European Solid-State Circuits Conference, Graz, Austria, September 14-18, 2015. pages 144-147, IEEE, 2015. [doi]
Abstract is missing.