Zhe Yuan, Jinshan Yue, Huanrui Yang, Zhibo Wang, Jinyang Li 0002, Yixiong Yang, Qingwei Guo, Xueqing Li, Meng-Fan Chang, Huazhong Yang, Yongpan Liu. Sticker: A 0.41-62.1 TOPS/W 8Bit Neural Network Processor with Multi-Sparsity Compatible Convolution Arrays and Online Tuning Acceleration for Fully Connected Layers. In 2018 IEEE Symposium on VLSI Circuits, Honolulu, HI, USA, June 18-22, 2018. pages 33-34, IEEE, 2018. [doi]
@inproceedings{YuanYYW0YGLCYL18,
title = {Sticker: A 0.41-62.1 TOPS/W 8Bit Neural Network Processor with Multi-Sparsity Compatible Convolution Arrays and Online Tuning Acceleration for Fully Connected Layers},
author = {Zhe Yuan and Jinshan Yue and Huanrui Yang and Zhibo Wang and Jinyang Li 0002 and Yixiong Yang and Qingwei Guo and Xueqing Li and Meng-Fan Chang and Huazhong Yang and Yongpan Liu},
year = {2018},
doi = {10.1109/VLSIC.2018.8502404},
url = {https://doi.org/10.1109/VLSIC.2018.8502404},
researchr = {https://researchr.org/publication/YuanYYW0YGLCYL18},
cites = {0},
citedby = {0},
pages = {33-34},
booktitle = {2018 IEEE Symposium on VLSI Circuits, Honolulu, HI, USA, June 18-22, 2018},
publisher = {IEEE},
isbn = {978-1-5386-4214-6},
}