A K-Band Fractional-N PLL with Low-Spur Low-Power Linearization Circuit and PVT Robust Spur Trapper

Zexin Yuan, Lei Zhang, Yan Wang. A K-Band Fractional-N PLL with Low-Spur Low-Power Linearization Circuit and PVT Robust Spur Trapper. In IEEE International Symposium on Circuits and Systems, ISCAS 2021, Daegu, South Korea, May 22-28, 2021. pages 1-5, IEEE, 2021. [doi]

@inproceedings{YuanZW21,
  title = {A K-Band Fractional-N PLL with Low-Spur Low-Power Linearization Circuit and PVT Robust Spur Trapper},
  author = {Zexin Yuan and Lei Zhang and Yan Wang},
  year = {2021},
  doi = {10.1109/ISCAS51556.2021.9401671},
  url = {https://doi.org/10.1109/ISCAS51556.2021.9401671},
  researchr = {https://researchr.org/publication/YuanZW21},
  cites = {0},
  citedby = {0},
  pages = {1-5},
  booktitle = {IEEE International Symposium on Circuits and Systems, ISCAS 2021, Daegu, South Korea, May 22-28, 2021},
  publisher = {IEEE},
  isbn = {978-1-7281-9201-7},
}