Approach for a Formal Verification of a Bit-serial Pipelined Architecture

Henning Zabel, Achim Rettberg, Alexander Krupp. Approach for a Formal Verification of a Bit-serial Pipelined Architecture. In Achim Rettberg, Mauro Cesar Zanella, Rainer Dömer, Andreas Gerstlauer, Franz-Josef Rammig, editors, Embedded System Design: Topics, Techniques and Trends, IFIP TC10 Working Conference: International Embedded Systems Symposium (IESS), May 30 - June 1, 2007, Irvine, CA, USA. Volume 231 of IFIP, pages 47-56, Springer, 2007. [doi]

Abstract

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