Optimizing Post-Silicon Validation for FPGA Serial Configuration using an Automation Framework and Timing Characterization Verification

Mohd Amiruddin Zainol, Sompon Khamron, Ng Gua Bin. Optimizing Post-Silicon Validation for FPGA Serial Configuration using an Automation Framework and Timing Characterization Verification. In IEEE International Test Conference in Asia, ITC-Asia 2023, Matsue, Japan, September 12-14, 2023. pages 1-6, IEEE, 2023. [doi]

Authors

Mohd Amiruddin Zainol

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Sompon Khamron

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Ng Gua Bin

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