A Simulation of Cache Sub-banking and Block Buffering as Power Reduction Techniques for Multiprocessor Cache Design

Jestoni V. Zarsuela, Anastacia Alvarez, Joy Alinda Reyes. A Simulation of Cache Sub-banking and Block Buffering as Power Reduction Techniques for Multiprocessor Cache Design. In David Al-Dabass, Alessandra Orsoni, Richard Cant, Ajith Abraham, editors, Proceedings of the 12th UKSim, International Conference on Computer Modelling and Simulation, Cambridge, UK, 24-26 March 2010. pages 515-520, IEEE, 2010. [doi]

Abstract

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