Algorithms for the design verification of bipolar array chips

David A. Zein, Oliver P. Engel, Gary S. Ditlow. Algorithms for the design verification of bipolar array chips. In 10th IEEE VLSI Test Symposium (VTS'92), 7-9 Apr 1992, Atlantic City, NJ, USA. pages 327-332, IEEE, 1992. [doi]

Abstract

Abstract is missing.