Multi-match packet classification on memory-logic trade-off FPGA-based architecture

Carlos A. Zerbini, Jorge M. Finochietto. Multi-match packet classification on memory-logic trade-off FPGA-based architecture. In IEEE 14th International Conference on High Performance Switching and Routing, HPSR 2013, Taipei, Taiwan, July 8-11, 2013. pages 121-127, IEEE, 2013. [doi]

Abstract

Abstract is missing.