An Untrimmed PVT-Robust 12-bit 1-MS/s SAR ADC IP in 55nm Deeply Depleted Channel CMOS Process - researchr publication related

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Y. Zha, Loïc Zahnd, Jiang Deng, David Ruffieux, Komail M. H. Badami, T. Mavrogordatos, Y. Matsuo, Stéphane Emery. An Untrimmed PVT-Robust 12-bit 1-MS/s SAR ADC IP in 55nm Deeply Depleted Channel CMOS Process. In IEEE Asian Solid-State Circuits Conference, A-SSCC 2019, Macau, SAR, China, November 4-6, 2019. pages 13-16, IEEE, 2019. [doi]

The following publications are possibly variants of this publication:

A 0.5 V 2.5 μW/MHz Microcontroller with Analog-Assisted Adaptive Body Bias PVT Compensation with 3.13nW/kB SRAM Retention in 55nm Deeply-Depleted Channel CMOSMarc Pons, Christoph Thomas Müller, David Ruffieux, Jean-Luc Nagel, Stéphane Emery, Andreas Burg, Shuuji Tanahashi, Yoshitaka Tanaka, Atsushi Takeuchi. cicc 2019: 1-4 [doi]

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