OSCAR: Orchestrating STT-RAM cache traffic for heterogeneous CPU-GPU architectures

Jia Zhan, Onur Kayiran, Gabriel H. Loh, Chita R. Das, Yuan Xie. OSCAR: Orchestrating STT-RAM cache traffic for heterogeneous CPU-GPU architectures. In 49th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2016, Taipei, Taiwan, October 15-19, 2016. pages 1-13, IEEE Computer Society, 2016. [doi]

Authors

Jia Zhan

This author has not been identified. Look up 'Jia Zhan' in Google

Onur Kayiran

This author has not been identified. Look up 'Onur Kayiran' in Google

Gabriel H. Loh

This author has not been identified. Look up 'Gabriel H. Loh' in Google

Chita R. Das

This author has not been identified. Look up 'Chita R. Das' in Google

Yuan Xie

This author has not been identified. Look up 'Yuan Xie' in Google