Jia Zhan, Onur Kayiran, Gabriel H. Loh, Chita R. Das, Yuan Xie. OSCAR: Orchestrating STT-RAM cache traffic for heterogeneous CPU-GPU architectures. In 49th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2016, Taipei, Taiwan, October 15-19, 2016. pages 1-13, IEEE Computer Society, 2016. [doi]
@inproceedings{ZhanKLDX16,
title = {OSCAR: Orchestrating STT-RAM cache traffic for heterogeneous CPU-GPU architectures},
author = {Jia Zhan and Onur Kayiran and Gabriel H. Loh and Chita R. Das and Yuan Xie},
year = {2016},
doi = {10.1109/MICRO.2016.7783731},
url = {http://doi.ieeecomputersociety.org/10.1109/MICRO.2016.7783731},
researchr = {https://researchr.org/publication/ZhanKLDX16},
cites = {0},
citedby = {0},
pages = {1-13},
booktitle = {49th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2016, Taipei, Taiwan, October 15-19, 2016},
publisher = {IEEE Computer Society},
isbn = {978-1-5090-3508-3},
}