A High-Performance Stochastic LDPC Decoder Architecture Designed via Correlation Analysis

Qichen Zhang, Yun Chen 0001, Shixian Li, Xiaoyang Zeng, Keshab K. Parhi. A High-Performance Stochastic LDPC Decoder Architecture Designed via Correlation Analysis. IEEE Trans. on Circuits and Systems, 67-I(12):5429-5442, 2020. [doi]

Abstract

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