An Efficient Asynchronous Batch Bayesian Optimization Approach for Analog Circuit Synthesis

Shuhan Zhang, Fan Yang 0001, Dian Zhou, Xuan Zeng 0001. An Efficient Asynchronous Batch Bayesian Optimization Approach for Analog Circuit Synthesis. In 57th ACM/IEEE Design Automation Conference, DAC 2020, San Francisco, CA, USA, July 20-24, 2020. pages 1-6, IEEE, 2020. [doi]

@inproceedings{Zhang0Z020-3,
  title = {An Efficient Asynchronous Batch Bayesian Optimization Approach for Analog Circuit Synthesis},
  author = {Shuhan Zhang and Fan Yang 0001 and Dian Zhou and Xuan Zeng 0001},
  year = {2020},
  doi = {10.1109/DAC18072.2020.9218592},
  url = {https://doi.org/10.1109/DAC18072.2020.9218592},
  researchr = {https://researchr.org/publication/Zhang0Z020-3},
  cites = {0},
  citedby = {0},
  pages = {1-6},
  booktitle = {57th ACM/IEEE Design Automation Conference, DAC 2020, San Francisco, CA, USA, July 20-24, 2020},
  publisher = {IEEE},
  isbn = {978-1-7281-1085-1},
}