A 35µW 96.8dB SNDR 1 kHz BW multi-step incremental ADC using multi-slope extended counting with a single integrator

Yi Zhang, Chia-Hung Chen, Tao He, Gabor C. Temes. A 35µW 96.8dB SNDR 1 kHz BW multi-step incremental ADC using multi-slope extended counting with a single integrator. In 2016 IEEE Symposium on VLSI Circuits, VLSIC 2016, Honolulu, HI, USA, June 15-17, 2016. pages 1-2, IEEE, 2016. [doi]

Authors

Yi Zhang

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Chia-Hung Chen

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Tao He

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Gabor C. Temes

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