Jianfeng Zhang, Paul Chow, Hengzhu Liu. FPGA implementation of low-power and high-PSNR DCT/IDCT architecture based on adaptive recoding CORDIC. In 2015 International Conference on Field Programmable Technology, FPT 2015, Queenstown, New Zealand, December 7-9, 2015. pages 128-135, IEEE, 2015. [doi]
@inproceedings{ZhangCL15-10,
title = {FPGA implementation of low-power and high-PSNR DCT/IDCT architecture based on adaptive recoding CORDIC},
author = {Jianfeng Zhang and Paul Chow and Hengzhu Liu},
year = {2015},
doi = {10.1109/FPT.2015.7393139},
url = {http://dx.doi.org/10.1109/FPT.2015.7393139},
researchr = {https://researchr.org/publication/ZhangCL15-10},
cites = {0},
citedby = {0},
pages = {128-135},
booktitle = {2015 International Conference on Field Programmable Technology, FPT 2015, Queenstown, New Zealand, December 7-9, 2015},
publisher = {IEEE},
isbn = {978-1-4673-9091-0},
}