Deming Zhang, Yanchun Hou, Chengzhi Wang, Jie Chen, Lang Zeng, Weisheng Zhao. Hardware Acceleration Implementation of Sparse Coding Algorithm with Spintronic Devices. In Proceedings of the 14th IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2018, Athens, Greece, July 17-19, 2018. pages 79-85, ACM, 2018. [doi]
@inproceedings{ZhangHWCZZ18,
title = {Hardware Acceleration Implementation of Sparse Coding Algorithm with Spintronic Devices},
author = {Deming Zhang and Yanchun Hou and Chengzhi Wang and Jie Chen and Lang Zeng and Weisheng Zhao},
year = {2018},
doi = {10.1145/3232195.3232220},
url = {https://doi.org/10.1145/3232195.3232220},
researchr = {https://researchr.org/publication/ZhangHWCZZ18},
cites = {0},
citedby = {0},
pages = {79-85},
booktitle = {Proceedings of the 14th IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2018, Athens, Greece, July 17-19, 2018},
publisher = {ACM},
isbn = {978-1-4503-5815-6},
}