Abstract is missing.
- Fast Estimations of Failure Probability Over Long Time SpansMichail Noltsis, Panayiotis Englezakis, Eleni Maragkoudaki, Chrysostomos Nicopoulos, Dimitrios Rodopoulos, Francky Catthoor, Yiannakis Sazeides, Davide Zoni, Dimitrios Soudris. 1-6 [doi]
- A Probabilistic Error Model and Framework for Approximate Booth MultipliersYuying Zhu, Weiqiang Liu, Jie Han 0001, Fabrizio Lombardi. 7-12 [doi]
- Variability-Tolerant Memristor-based Ratioed Logic in Crossbar ArrayM. Escudero, Ioannis Vourkas, A. Rubio, Francesc Moll. 13-18 [doi]
- High-Endurance Bipolar ReRAM-Based Non-Volatile Flip-Flops with Run-Time Tunable Resistive StatesMehrdad Biglari, Tobias Lieske, Dietmar Fey. 19-24 [doi]
- An Aging Resilient Neural Network ArchitectureSeyed Nima Mozaffari, Krishna Prasad Gnawali, Spyros Tragoudas. 25-30 [doi]
- Overcoming Crossbar Nonidealities in Binary Neural Networks Through LearningMohammed E. Fouda, Jongeun Lee, Ahmed M. Eltawil, Fadi J. Kurdahi. 31-33 [doi]
- Real-Time Trainable Data Converters for General Purpose ApplicationsLoai Danial, Shahar Kvatinsky. 34-36 [doi]
- Programmable Molecular-Nanoparticle Multi-junction Networks for Logic OperationsAngelika Balliou, Jiri Pfleger, George Skoulatakis, Samrana Kazim, Jan Rakusan, Stella Kennou, Nikos Glezos. 37-43 [doi]
- Multi-Valued Logic Circuits on Graphene Quantum Point Contact DevicesKonstantinos Rallis, Georgios Ch. Sirakoulis, Ioannis Karafyllidis, Antonio Rubio. 44-48 [doi]
- Sequential Circuit Design with Bilayer Avalanche Spin Diode LogicVaibhav Vyas, Joseph S. Friedman. 49-50 [doi]
- Complementary Arranged Graphene Nanoribbon-based Boolean GatesYande Jiang, Nicoleta Cucu Laurenciu, Sorin Cotofana. 51-57 [doi]
- CCE: A Combined SRAM and Non Volatile Cache for Endurance of Next Generation Multilevel Non Volatile Memories in Embedded SystemsLinbin Chen, Pilin Junsangsri, Pedro Reviriego, Fabrizio Lombardi. 58-64 [doi]
- Regular Expression Matching with Memristor TCAMs for Network SecurityCatherine E. Graves, Wen Ma, Xia Sheng, Brent Buchanan, Le Zheng, Sity Lam, Xuema Li, Sai Rahul Chalamalasetti, Lennie Kiyama, Martin Foltin, John Paul Strachan, Matthew P. Hardy. 65-71 [doi]
- A Novel Cross-point MRAM with Diode Selector Capable of High-Density, High-Speed, and Low-Power In-Memory ComputationChaoxin Ding, Wang Kang, He Zhang, Youguang Zhang, Weisheng Zhao. 72-78 [doi]
- Hardware Acceleration Implementation of Sparse Coding Algorithm with Spintronic DevicesDeming Zhang, Yanchun Hou, Chengzhi Wang, Jie Chen, Lang Zeng, Weisheng Zhao. 79-85 [doi]
- Quantum-dot Cellular Automata RAM design using Crossbar ArchitectureOrestis Liolis, Vassilios A. Mardiris, Georgios Ch. Sirakoulis, Ioannis G. Karafyllidis. 86-90 [doi]
- Integrated Synthesis Methodology for Crossbar ArraysMuhammed Ceylan Morgül, Onur Tunali, Mustafa Altun, Luca Frontini, Valentina Ciriani, Elena Ioana Vatajelu, Lorena Anghel, Csaba Andras Moritz, Mircea R. Stan, Dan Alexandrescu. 91-97 [doi]
- Minimal Disturbed Bits in Writing Resistive Crossbar MemoriesMohammed E. Fouda, Ahmed M. Eltawil, Fadi J. Kurdahi. 98-100 [doi]
- A Recursive Growing & Featuring Mechanism for Nanocomputing StructuresMihaela Malita, Gheorghe M. Stefan. 101-106 [doi]
- Free BDD based CAD of Compact Memristor Crossbars for in-Memory ComputingAmad Ul Hassen, Salman Anwar Khokhar, Haseeb Aslam Butt, Sumit Kumar Jha 0001. 107-113 [doi]
- Crosstalk based Fine-Grained Reconfiguration Techniques for Polymorphic CircuitsNaveen Kumar Macha, Sandeep Geedipally, Bhavana Tejaswini Repalle, Md Arif Iqbal, Wafi Danesh, Mostafizur Rahman. 114-120 [doi]
- A Novel Analog to Digital Conversion Concept with Crosstalk ComputingRajanikanth Desh, Naveen Kumar Macha, Sehtab Hossain, Repalle Bhavana Tejaswini, Mostafizur Rahman. 121-123 [doi]
- Energy Efficiency of Low Swing Signaling for Emerging Interposer TechnologiesEleni Maragkoudaki, Przemyslaw Mroszczyk, Vasilis F. Pavlidis. 124-130 [doi]
- Energy-Efficient 4T SRAM Bitcell with 2T Read-Port for Ultra-Low-Voltage Operations in 28 nm 3D Monolithic CoolCubeTM TechnologyReda Boumchedda, Jean-Philippe Noel, Bastien Giraud, Adam Makosiej, Marco Antonio Rios, Eduardo Esmanhotto, Emilien Bourde-Cicé, Mathis Bellet, David Turgis, Edith Beigné. 131-137 [doi]
- Energy-efficient MFCC extraction architecture in mixed-signal domain for automatic speech recognitionQin Li, Huifeng Zhu, Fei Qiao, Qi Wei 0001, Xinjun Liu, Huazhong Yang. 138-140 [doi]
- Power Analysis of an mRNA-Ribosome SystemPratima Chatterjee, Prasun Ghosal. 141-146 [doi]
- Controlling distilleries in fault-tolerant quantum circuits: problem statement and analysis towards a solutionAlexandru Paler. 147-152 [doi]
- Signal Synchronization in Large Scale Quantum-dot Cellular Automata CircuitsVassilios A. Mardiris, Orestis Liolis, Georgios Ch. Sirakoulis, Ioannis G. Karafyllidis. 153-156 [doi]
- Size Optimization of MIGs with an Application to QCA and STMG TechnologiesHeinz Riener, Eleonora Testa, Luca Amarù, Mathias Soeken, Giovanni De Micheli. 157-162 [doi]
- Representation of Qubit States using 3D Memristance Spaces: A first step towards a Memristive Quantum SimulatorIoannis Karafyllidis, Georgios Ch. Sirakoulis, Panagiotis Dimitrakis. 163-168 [doi]