A low-hardware consumption FPGA based configurable LDPC decoder

Lijun Zhang, Ying Jiang. A low-hardware consumption FPGA based configurable LDPC decoder. In International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2013, Naha-shi, Japan, November 12-15, 2013. pages 221-224, IEEE, 2013. [doi]

Abstract

Abstract is missing.