Jian Zhang, Shuguo Li. High Speed Parallel Architecture for Cyclic Convolution Based on FNT. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2009, 13-15 May 2009, Tampa, Florida, USA. pages 199-204, IEEE Computer Society, 2009. [doi]
@inproceedings{ZhangL09-51, title = {High Speed Parallel Architecture for Cyclic Convolution Based on FNT}, author = {Jian Zhang and Shuguo Li}, year = {2009}, doi = {10.1109/ISVLSI.2009.10}, url = {http://dx.doi.org/10.1109/ISVLSI.2009.10}, tags = {rule-based, architecture}, researchr = {https://researchr.org/publication/ZhangL09-51}, cites = {0}, citedby = {0}, pages = {199-204}, booktitle = {IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2009, 13-15 May 2009, Tampa, Florida, USA}, publisher = {IEEE Computer Society}, }