Characterization and Design of Logic Circuits in the Presence of Carbon Nanotube Density Variations - researchr publication authors

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Jie Zhang, Nishant Patil, Arash Hazeghi, H.-S. Philip Wong, Subhasish Mitra. Characterization and Design of Logic Circuits in the Presence of Carbon Nanotube Density Variations. IEEE Trans. on CAD of Integrated Circuits and Systems, 30(8):1103-1113, 2011. [doi]

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Jie Zhang

Look up 'Jie Zhang' in GoogleThis author has not been identified. Look up 'Nishant Patil' in GoogleThis author has not been identified. Look up 'Arash Hazeghi' in GoogleThis author has not been identified. Look up 'H.-S. Philip Wong' in GoogleThis author has not been identified. Look up 'Subhasish Mitra' in Google

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