A fully automated large-scale addressable test chip design with high reliability

Bo Zhang, Weiwei Pan, Yongjun Zheng, Zheng Shi, Xiaolang Yan. A fully automated large-scale addressable test chip design with high reliability. In 20th European Conference on Circuit Theory and Design, ECCTD 2011, Linkoping, Sweden, Aug. 29-31, 2011. pages 61-64, IEEE, 2011. [doi]

Authors

Bo Zhang

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Weiwei Pan

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Yongjun Zheng

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Zheng Shi

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Xiaolang Yan

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