A fully automated large-scale addressable test chip design with high reliability

Bo Zhang, Weiwei Pan, Yongjun Zheng, Zheng Shi, Xiaolang Yan. A fully automated large-scale addressable test chip design with high reliability. In 20th European Conference on Circuit Theory and Design, ECCTD 2011, Linkoping, Sweden, Aug. 29-31, 2011. pages 61-64, IEEE, 2011. [doi]

@inproceedings{ZhangPZSY11,
  title = {A fully automated large-scale addressable test chip design with high reliability},
  author = {Bo Zhang and Weiwei Pan and Yongjun Zheng and Zheng Shi and Xiaolang Yan},
  year = {2011},
  doi = {10.1109/ECCTD.2011.6043609},
  url = {http://dx.doi.org/10.1109/ECCTD.2011.6043609},
  researchr = {https://researchr.org/publication/ZhangPZSY11},
  cites = {0},
  citedby = {0},
  pages = {61-64},
  booktitle = {20th European Conference on Circuit Theory and Design, ECCTD 2011, Linkoping, Sweden, Aug. 29-31, 2011},
  publisher = {IEEE},
  isbn = {978-1-4577-0617-2},
}