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Sai Zhang, Jane S. Tu, Naresh R. Shanbhag, Philip T. Krein. A 0.79 pJ/K-Gate, 83% Efficient Unified Core and Voltage Regulator Architecture for Sub/Near-Threshold Operation in 130 nm CMOS. J. Solid-State Circuits, 49(11):2644-2657, 2014. [doi]