Jieru Zhao, Liang Feng, Sharad Sinha, Wei Zhang 0012, Yun Liang 0001, Bingsheng He. Performance Modeling and Directives Optimization for High-Level Synthesis on FPGA. IEEE Trans. on CAD of Integrated Circuits and Systems, 39(7):1428-1441, 2020. [doi]
@article{ZhaoFSZLH20,
title = {Performance Modeling and Directives Optimization for High-Level Synthesis on FPGA},
author = {Jieru Zhao and Liang Feng and Sharad Sinha and Wei Zhang 0012 and Yun Liang 0001 and Bingsheng He},
year = {2020},
doi = {10.1109/TCAD.2019.2912916},
url = {https://doi.org/10.1109/TCAD.2019.2912916},
researchr = {https://researchr.org/publication/ZhaoFSZLH20},
cites = {0},
citedby = {0},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {39},
number = {7},
pages = {1428-1441},
}