AES architectures for minimum-energy operation and silicon demonstration in 65nm with lowest energy per encryption - researchr publication authors

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Wenfeng Zhao, Yajun Ha, Massimo Alioto. AES architectures for minimum-energy operation and silicon demonstration in 65nm with lowest energy per encryption. In 2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015, Lisbon, Portugal, May 24-27, 2015. pages 2349-2352, IEEE, 2015. [doi]

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Massimo Alioto

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