TSV array utilization in low-power 3D clock network design

Xin Zhao, Sung Kyu Lim. TSV array utilization in low-power 3D clock network design. In Naresh R. Shanbhag, Massimo Poncino, Pai H. Chou, Ajith Amerasekera, editors, International Symposium on Low Power Electronics and Design, ISLPED'12, Redondo Beach, CA, USA - July 30 - August 01, 2012. pages 21-26, ACM, 2012. [doi]

@inproceedings{ZhaoL12-16,
  title = {TSV array utilization in low-power 3D clock network design},
  author = {Xin Zhao and Sung Kyu Lim},
  year = {2012},
  doi = {10.1145/2333660.2333668},
  url = {http://doi.acm.org/10.1145/2333660.2333668},
  researchr = {https://researchr.org/publication/ZhaoL12-16},
  cites = {0},
  citedby = {0},
  pages = {21-26},
  booktitle = {International Symposium on Low Power Electronics and Design, ISLPED'12, Redondo Beach, CA, USA - July 30 - August 01, 2012},
  editor = {Naresh R. Shanbhag and Massimo Poncino and Pai H. Chou and Ajith Amerasekera},
  publisher = {ACM},
  isbn = {978-1-4503-1249-3},
}