Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching Memories - researchr publication authors

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Weisheng Zhao, Mathieu Moreau, Erya Deng, Yue Zhang, Jean Michel Portal, Jacques-Olivier Klein, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller, Damien Querlioz, Nesrine Ben Romdhane, Dafine Ravelosona, Claude Chappert. Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching Memories. IEEE Trans. on Circuits and Systems, 61-I(2):443-454, 2014. [doi]

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