A 40 Gbps PAM-4 Receiver with 12-Tap Direct Decision Feedback Equalizer Employing 1.5-stage Slicers in 65-nm CMOS

Zeliang Zhao, Xin Wu, Dengjie Wang, Ziqiang Wang, Chun Zhang, Xiangyu Li, Zhihua Wang 0001. A 40 Gbps PAM-4 Receiver with 12-Tap Direct Decision Feedback Equalizer Employing 1.5-stage Slicers in 65-nm CMOS. In 2021 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2021, Zhuhai, China, November 24-26, 2021. pages 230-231, IEEE, 2021. [doi]

@inproceedings{ZhaoWWWZL021,
  title = {A 40 Gbps PAM-4 Receiver with 12-Tap Direct Decision Feedback Equalizer Employing 1.5-stage Slicers in 65-nm CMOS},
  author = {Zeliang Zhao and Xin Wu and Dengjie Wang and Ziqiang Wang and Chun Zhang and Xiangyu Li and Zhihua Wang 0001},
  year = {2021},
  doi = {10.1109/ICTA53157.2021.9661649},
  url = {https://doi.org/10.1109/ICTA53157.2021.9661649},
  researchr = {https://researchr.org/publication/ZhaoWWWZL021},
  cites = {0},
  citedby = {0},
  pages = {230-231},
  booktitle = {2021 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2021, Zhuhai, China, November 24-26, 2021},
  publisher = {IEEE},
  isbn = {978-1-6654-1747-1},
}