A Low-Latency and High-Endurance MLC STT-MRAM-Based Cache System

Wei Zhao 0013, Jie Xu 0013, Xueliang Wei, Bing Wu 0001, Chengning Wang, Weilin Zhu, Wei Tong 0001, Dan Feng 0001, Jingning Liu. A Low-Latency and High-Endurance MLC STT-MRAM-Based Cache System. IEEE Trans. on CAD of Integrated Circuits and Systems, 42(1):122-135, 2023. [doi]

Authors

Wei Zhao 0013

This author has not been identified. Look up 'Wei Zhao 0013' in Google

Jie Xu 0013

This author has not been identified. Look up 'Jie Xu 0013' in Google

Xueliang Wei

This author has not been identified. Look up 'Xueliang Wei' in Google

Bing Wu 0001

This author has not been identified. Look up 'Bing Wu 0001' in Google

Chengning Wang

This author has not been identified. Look up 'Chengning Wang' in Google

Weilin Zhu

This author has not been identified. Look up 'Weilin Zhu' in Google

Wei Tong 0001

This author has not been identified. Look up 'Wei Tong 0001' in Google

Dan Feng 0001

This author has not been identified. Look up 'Dan Feng 0001' in Google

Jingning Liu

This author has not been identified. Look up 'Jingning Liu' in Google