Exploiting Near-Memory Processing Architectures for Bayesian Neural Networks Acceleration - researchr publication authors

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Yinglin Zhao, Jianlei Yang, Xiaotao Jia, Xueyan Wang, Zhaohao Wang, Wang Kang, Youguang Zhang, Weisheng Zhao. Exploiting Near-Memory Processing Architectures for Bayesian Neural Networks Acceleration. In 2019 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2019, Miami, FL, USA, July 15-17, 2019. pages 203-206, IEEE, 2019. [doi]

This author has not been identified. Look up 'Yinglin Zhao' in GoogleThis author has not been identified. Look up 'Jianlei Yang' in GoogleThis author has not been identified. Look up 'Xiaotao Jia' in GoogleThis author has not been identified. Look up 'Xueyan Wang' in GoogleThis author has not been identified. Look up 'Zhaohao Wang' in GoogleThis author has not been identified. Look up 'Wang Kang' in GoogleThis author has not been identified. Look up 'Youguang Zhang' in GoogleThis author has not been identified. Look up 'Weisheng Zhao' in Google

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