A Low-power Shared Cache Design with Modified PID Controller for Efficient Multicore Embedded Systems

Huatao Zhao, Jiongyao Ye, Takahiro Watanabe. A Low-power Shared Cache Design with Modified PID Controller for Efficient Multicore Embedded Systems. JIP, 27:149-158, 2019. [doi]

@article{ZhaoYW19-0,
  title = {A Low-power Shared Cache Design with Modified PID Controller for Efficient Multicore Embedded Systems},
  author = {Huatao Zhao and Jiongyao Ye and Takahiro Watanabe},
  year = {2019},
  doi = {10.2197/ipsjjip.27.149},
  url = {https://doi.org/10.2197/ipsjjip.27.149},
  researchr = {https://researchr.org/publication/ZhaoYW19-0},
  cites = {0},
  citedby = {0},
  journal = {JIP},
  volume = {27},
  pages = {149-158},
}