Exploring hardware transaction processing for reliable computing in chip-multiprocessors against soft errors

Chuanlei Zheng, Parijat Shukla, Shuai Wang, Jie S. Hu. Exploring hardware transaction processing for reliable computing in chip-multiprocessors against soft errors. In 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2012, Austin, TX, USA, October 3-5, 2012. pages 92-97, IEEE Computer Society, 2012. [doi]

@inproceedings{ZhengSWH12,
  title = {Exploring hardware transaction processing for reliable computing in chip-multiprocessors against soft errors},
  author = {Chuanlei Zheng and Parijat Shukla and Shuai Wang and Jie S. Hu},
  year = {2012},
  doi = {10.1109/DFT.2012.6378206},
  url = {http://doi.ieeecomputersociety.org/10.1109/DFT.2012.6378206},
  researchr = {https://researchr.org/publication/ZhengSWH12},
  cites = {0},
  citedby = {0},
  pages = {92-97},
  booktitle = {2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2012, Austin, TX, USA, October 3-5, 2012},
  publisher = {IEEE Computer Society},
  isbn = {978-1-4673-3043-5},
}