Precision Improvement of Power-Efficient Capacitive Senor Readout Circuit Using Multi-Nested Clocks

Longjie Zhong, Donglai Xu, Xinquan Lai, Yuheng Wang, Xinqin Liao, Zhongyuan Fang, Yuanjin Zheng. Precision Improvement of Power-Efficient Capacitive Senor Readout Circuit Using Multi-Nested Clocks. IEEE Trans. on Circuits and Systems, 67-I(8):2578-2587, 2020. [doi]

@article{ZhongXLWLFZ20,
  title = {Precision Improvement of Power-Efficient Capacitive Senor Readout Circuit Using Multi-Nested Clocks},
  author = {Longjie Zhong and Donglai Xu and Xinquan Lai and Yuheng Wang and Xinqin Liao and Zhongyuan Fang and Yuanjin Zheng},
  year = {2020},
  doi = {10.1109/TCSI.2020.2979316},
  url = {https://doi.org/10.1109/TCSI.2020.2979316},
  researchr = {https://researchr.org/publication/ZhongXLWLFZ20},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on Circuits and Systems},
  volume = {67-I},
  number = {8},
  pages = {2578-2587},
}