Modeling MOS Snapback for Circuit-Level ESD Simulation Using BSIM3 and VBIC Models

Yuanzhong (Paul) Zhou, Duane Connerney, Ronald Carroll, Timwah Luk. Modeling MOS Snapback for Circuit-Level ESD Simulation Using BSIM3 and VBIC Models. In 6th International Symposium on Quality of Electronic Design (ISQED 2005), 21-23 March 2005, San Jose, CA, USA. pages 476-481, IEEE Computer Society, 2005. [doi]

Abstract

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