Implementing a 2-Gbs 1024-bit 1/2-rate low-density parity-check code decoder in three-dimensional integrated circuits

Lili Zhou, Cherry Wakayama, Robin Panda, Nuttorn Jangkrajarng, Bo Hu, C.-J. Richard Shi. Implementing a 2-Gbs 1024-bit 1/2-rate low-density parity-check code decoder in three-dimensional integrated circuits. In 25th International Conference on Computer Design, ICCD 2007, 7-10 October 2007, Lake Tahoe, CA, USA, Proceedings. pages 194-201, IEEE, 2007. [doi]

@inproceedings{ZhouWPJHS07,
  title = {Implementing a 2-Gbs 1024-bit 1/2-rate low-density parity-check code decoder in three-dimensional integrated circuits},
  author = {Lili Zhou and Cherry Wakayama and Robin Panda and Nuttorn Jangkrajarng and Bo Hu and C.-J. Richard Shi},
  year = {2007},
  doi = {10.1109/ICCD.2007.4601900},
  url = {http://dx.doi.org/10.1109/ICCD.2007.4601900},
  tags = {C++},
  researchr = {https://researchr.org/publication/ZhouWPJHS07},
  cites = {0},
  citedby = {0},
  pages = {194-201},
  booktitle = {25th International Conference on Computer Design, ICCD 2007, 7-10 October 2007, Lake Tahoe, CA, USA, Proceedings},
  publisher = {IEEE},
  isbn = {1-4244-1258-7},
}