A 16-65 cycles/MB H.264/AVC motion compensation architecture for Quad-HD applications

Jinjia Zhou, Dajiang Zhou, Gang He, Satoshi Goto. A 16-65 cycles/MB H.264/AVC motion compensation architecture for Quad-HD applications. In Proceedings of the 19th European Signal Processing Conference, EUSIPCO 2011, Barcelona, Spain, August 29 - Sept. 2, 2011. pages 729-733, IEEE, 2011. [doi]

@inproceedings{ZhouZHG11-0,
  title = {A 16-65 cycles/MB H.264/AVC motion compensation architecture for Quad-HD applications},
  author = {Jinjia Zhou and Dajiang Zhou and Gang He and Satoshi Goto},
  year = {2011},
  url = {http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=7073996},
  researchr = {https://researchr.org/publication/ZhouZHG11-0},
  cites = {0},
  citedby = {0},
  pages = {729-733},
  booktitle = {Proceedings of the 19th European Signal Processing Conference, EUSIPCO 2011, Barcelona, Spain, August 29 - Sept. 2, 2011},
  publisher = {IEEE},
}